High-speed communication systems use recovery circuits to regenerate clock and data signals from scrambled inputs that have been corrupted by jitter, inter symbol interference, and other forms of noise. In order to evaluate the performance of clock and data recovery circuits in an optical link receiver without any photonic devices or electro-optical conversion, a circuit known as jitter noise generator has been used.
More specifically, during normal operating conditions an optical receiver is expected to receive data which is corrupted by noise. In order to evaluate its performance limitations, the receiver can be tested without connecting it to an optical link. A jitter noise generator is one type of testing device that can be used for this purpose. During a test, a jitter noise injector inputs noise into the receiver in order to simulate actual operating conditions. Output data is then evaluated to determine the level of optical link noise the receiver can tolerate as well as other performance parameters.
The performance capabilities of jitter noise generators have a direct effect on noise tolerance. These capabilities are largely constrained by the inherent limitations of their internal delays cells. One delay cell which has been proposed for use in a jitter noise generator is shown in FIG. 1. This cell includes a load composed of four transistors P1–P4, a current source CS, two nodes for receiving a differential input signal IP and IN through respective transistors T5 and T6, and two nodes for supplying a differential output signal OP and ON.
The FIG. 1 delay cell has proven to significantly limit the tuning range and timing resolution of jitter noise generators, as well as other circuits. Timing resolution is limited, for example, by the minimum delay of the cell. This, in turn, limits ability of the generator to evaluate the performance of clock and data recovery circuits, which are vital to ensuring proper operation of high-speed communication and signaling systems. Also, because the delay cell accepts only one input, it cannot perform phase interpolation for its input signal that may be desirable for evaluating performance of the receiver.